Verilog Code to realize 4-bit binary to gray converter 

module b2g(b_in, g_op);
input [3:0] b_in;
output [3:0] g_op;
assign g_op[3] = b_in[3];
assign g_op[2] = b_in[3] ^ b_in[2];
assign g_op[1] = b_in[2] ^ b_in[1];
assign g_op[0] = b_in[1] ^ b_in[0];
endmodule


Video link==https://youtu.be/n2cRoB9uFt0